Arteris

Arteris, Inc. is a semiconductor technology company headquartered in Campbell, California. It develops intellectual property and software used to design the internal data-movement, integration, verification, and security architecture of advanced systems-on-chip and chiplet-based systems. Rather than selling finished chips to consumers, Arteris supplies foundational technology that semiconductor companies and electronics designers incorporate into their own silicon products. The company’s principal technical specialization is network-on-chip, or NoC, interconnect IP. NoCs replace or supplement traditional centralized buses and crossbar structures by distributing communication across a packetized network of smaller interconnect elements. This approach is intended to help chip designers manage routing congestion, timing closure, power consumption, die area, and the increasing complexity of systems containing multiple processors, accelerators, memories, and specialized functions. Arteris is best known for FlexNoC, its NoC interconnect IP family. The company also offers FlexGen, a smart non-coherent NoC product; Ncore, a cache-coherent interconnect; CodaCache, a last-level cache; and related safety and scalability options. Arteris was established in 2004 by Philippe Boucard and two other engineering executives who had previously worked together at T.Sqware. The founding team sought to address limitations in conventional on-chip communication architectures as semiconductor designs became larger and more difficult to close physically and electrically. The company raised venture funding from investors that included ARM Holdings, Crescendo Ventures, DoCoMo Capital, Qualcomm, Synopsys, TVM Capital, and Ventech. It introduced its first commercially available NoC IP, NoC Solution, in 2006, and followed it with FlexNoC in 2009. The business expanded as major semiconductor companies adopted NoC technology for increasingly complex SoCs. By 2012, Arteris reported more than 40 semiconductor customers and approximately 200 million SoCs produced with its IP. Its customer and licensee base has since included companies across automotive, mobile, communications, artificial intelligence, industrial, and computing markets. Publicly identified licensees and users have included AMD, Altera, Axelera AI, Samsung Electronics, NXP, Texas Instruments, STMicroelectronics, Renesas Electronics, Mobileye, Baidu, Hailo, Tenstorrent, Rebellions, Socionext, Honda, Hyundai Mobis, Microchip, Nio, SiMa.ai, SK Telecom, Kyocera, and others. In 2013, Qualcomm Technologies acquired the FlexNoC product portfolio. Arteris retained existing customer contracts and continued licensing and supporting FlexNoC, while Qualcomm supplied engineering deliverables and product updates. The transaction did not give Qualcomm an ownership interest in Arteris. Arteris subsequently broadened its portfolio beyond interconnect IP. In 2020 it acquired Magillem Design Services, adding tools based on the IEEE 1685 IP-XACT standard for IP packaging, SoC assembly, system integration, documentation, and related software and firmware workflows. In 2023 it acquired Semifore, expanding its hardware-software interface and integration automation capabilities. The company also developed products for safety-critical designs. The FlexNoC Resilience Package, introduced in 2014, added functional-safety mechanisms relevant to standards such as ISO 26262 and IEC 61508. Ncore was first released in 2016 and later expanded to support multiple processor and interface protocols, including Arm and RISC-V-based systems. FlexNoC 5, launched in 2023, added physically aware design capabilities intended to reduce manual physical-design iterations and improve power, performance, and area management. Arteris became a public company through an initial public offering priced in 2021 under the Nasdaq ticker AIP. In 2025 it launched FlexGen, positioned as a productivity-oriented smart NoC product for SoC and chiplet designs. In 2026 it completed the acquisition of Cycuity, adding semiconductor hardware-security assurance technologies for simulation, emulation, and static analysis. The resulting portfolio spans system interconnect, cache and memory communication, IP and register integration, multi-die architecture, and design-stage hardware security. Arteris serves as an infrastructure provider within the semiconductor design ecosystem. Its technologies are intended to work with processor architectures, EDA tools, foundries, IP suppliers, design houses, and software environments. The company states that its IP has been used in more than 4 billion shipped devices and more than 880 design starts, although the timing and scope of these figures should be checked against the relevant company disclosure.

Arteris was founded in 2004 by Philippe Boucard and two other engineering executives formerly associated with T.Sqware, a startup later acquired by Globespan. The founders focused on a growing semiconductor-design problem: conventional buses and crossbar interconnects became increasingly difficult to route and close as SoCs accumulated more processors, memories, accelerators, and peripheral functions. These architectures could create wiring congestion, timing problems, excessive power consumption, and unnecessary die area. Arteris was formed to develop a more scalable communication fabric based on network-on-chip principles. The company obtained venture financing from a group that included ARM Holdings, Crescendo Ventures, DoCoMo Capital, Qualcomm, Synopsys, TVM Capital, and Ventech. In 2006 it developed NoC Solution, described as the first commercially available product in its category. In 2009 Arteris introduced FlexNoC, a more advanced interconnect IP family. FlexNoC used packetized communication and distributed interconnect elements rather than relying solely on a centralized bus or crossbar. Arteris promoted the architecture as a way to reduce wiring and logic overhead while improving design flexibility and physical implementation. Adoption increased during the early 2010s as semiconductor companies developed increasingly complex mobile, automotive, communications, and consumer SoCs. By 2012, Arteris reported more than 40 semiconductor customers and approximately 200 million SoCs produced with its IP. The company’s customer base later expanded into artificial intelligence, machine learning, industrial computing, automotive electronics, and other markets where large numbers of processing and memory components must communicate within constrained silicon designs. In October 2013, Qualcomm Technologies acquired the FlexNoC product portfolio. Arteris retained existing customer contracts and continued licensing and modifying FlexNoC source code for customer support, while Qualcomm supplied engineering deliverables and updates. The transaction did not make Qualcomm an owner of Arteris. Arteris continued to develop its own business and broadened its portfolio beyond the original NoC offering. Functional safety became an important area of product development. In 2014, Arteris launched the FlexNoC Resilience Package, adding mechanisms intended for safety-critical designs and standards-oriented development, including ISO 26262 and IEC 61508 contexts. In 2016, it released the first Ncore cache-coherent interconnect IP, extending the company’s scope from non-coherent communication fabrics to systems in which processors and agents share coherent memory. Ncore was later presented in a newer version with an optional resilience package at the 2017 Linley Processor Conference. Arteris expanded into integration automation through acquisitions. In 2020, it acquired Magillem Design Services, adding IP-XACT-oriented tools for packaging intellectual property, creating memory maps, assembling SoCs, and supporting software, firmware, verification, simulation, and documentation processes. In 2021, Arteris priced an initial public offering and listed on Nasdaq under the ticker AIP. In 2023, it acquired Semifore, a provider of hardware-software interface technology, further strengthening its system-integration automation business. The company continued its product development in NoC and physically informed implementation. FlexNoC 5, launched in 2023, was designed to incorporate physical constraints earlier in the interconnect-design process. In 2024, Arteris released an updated Ncore supporting a range of processor and interface protocols, including interfaces associated with Arm and RISC-V systems. These developments reflected the increasing heterogeneity of modern SoCs, in which different processor types, accelerators, memories, and legacy subsystems may need to coexist on one communication fabric. In 2025, Arteris launched FlexGen, a smart NoC product aimed at improving design productivity for SoC and chiplet architectures. The company described FlexGen as reducing design iterations, wire length, and latency. In 2026, Arteris completed the acquisition of Cycuity, adding hardware-security assurance products covering simulation, emulation, and static analysis. This expanded the company’s scope from moving and integrating data within chips to helping identify hardware vulnerabilities during the semiconductor design process. Arteris now presents itself as a system-IP and semiconductor-design automation provider. Its technologies support monolithic SoCs as well as multi-die and chiplet-based systems, including homogeneous scale-out and heterogeneous disaggregation architectures. The company operates within a broad ecosystem involving processor-architecture providers, EDA vendors, foundries, semiconductor IP companies, design houses, software developers, research organizations, and standards bodies. Arteris states that its technology has been used in more than 4 billion shipped units and more than 880 design starts; these figures are time-sensitive company claims and should be verified against current disclosures.

• 2026

  Cycuity acquisition closes

  [1]Arterisen.wikipedia.org

  Arteris completes its acquisition of Cycuity and adds hardware-security assurance technologies to its semiconductor design portfolio.

• 2025

  FlexGen launches

  [1]Arterisen.wikipedia.org

  Arteris introduces FlexGen, a smart NoC interconnect IP product for advanced SoC and chiplet designs.

• 2023

  Semifore acquisition and FlexNoC 5 launch

  [1]Arterisen.wikipedia.org

  Arteris acquires Semifore and launches FlexNoC 5 with physically aware NoC capabilities.

• 2021

  Initial public offering

  [1]Arterisen.wikipedia.org

  Arteris announces the pricing of its initial public offering and lists on Nasdaq as AIP.

• 2020

  Magillem acquisition

  [1]Arterisen.wikipedia.org

  Arteris acquires Magillem Design Services and adds IP-XACT-based SoC integration automation products.

• 2016

  Ncore launches

  [1]Arterisen.wikipedia.org

  Arteris releases its first cache-coherent interconnect IP product.

• 2014

  FlexNoC Resilience Package launches

  [1]Arterisen.wikipedia.org

  Arteris adds functional-safety mechanisms to FlexNoC for safety-critical semiconductor applications.

• 2013

  Qualcomm acquires the FlexNoC portfolio

  [1]Arterisen.wikipedia.org

  Qualcomm Technologies acquires the FlexNoC product portfolio while Arteris retains customer contracts and continues licensing and support activities.

• 2012

  Early customer expansion

  [1]Arterisen.wikipedia.org

  Arteris reports more than 40 semiconductor customers and approximately 200 million SoCs produced with its IP.

• 2009

  FlexNoC launches

  [1]Arterisen.wikipedia.org

  The company introduces FlexNoC, a packetized and distributed NoC interconnect IP family that becomes its best-known product.

• 2006

  NoC Solution becomes commercially available

  [1]Arterisen.wikipedia.org

  Arteris develops its first commercially available network-on-chip IP product, NoC Solution.

• 2004

  Arteris is founded

  [1]Arterisen.wikipedia.org

  Philippe Boucard and two former T.Sqware engineering executives establish Arteris to address scalability and physical-design problems in conventional SoC interconnect architectures.

Arteris positions itself as a supplier of semiconductor system IP and design automation technology that helps engineering teams connect, integrate, verify, scale, and secure complex SoCs and chiplet-based systems. Its value proposition centers on reducing design complexity and iteration, while supporting performance, power, area, functional safety, interoperability, and hardware security requirements.

• Network-on-chip interconnect IP · 2009

  FlexNoC

  FlexNoC is Arteris’s flagship network-on-chip interconnect IP family. It provides an underlying communication fabric for complex SoCs, allowing processor cores, accelerators, memories, peripherals, and other IP blocks to exchange data through a distributed, packetized architecture. The product is aimed at reducing the routing, timing, power, and area challenges associated with large centralized buses and crossbars. Optional resilience and scalability packages extend its suitability for safety-critical and very large designs.

• Smart network-on-chip IP · 2025

  FlexGen

  FlexGen is a smart NoC interconnect IP product introduced for modern SoC and chiplet designs. Arteris positions it as a productivity-oriented technology that can automate or improve aspects of interconnect development, reduce physical-design iteration, and help manage wire length and latency. It is intended for advanced systems in which architectural complexity and physical implementation constraints must be considered together.

• Cache-coherent interconnect IP · 2016

  Ncore

  Ncore is a cache-coherent interconnect IP product for systems in which multiple processing agents and subsystems need consistent access to shared memory. It supports heterogeneous integration through multiple interface protocols, including coherent and input/output-coherent interfaces as well as AXI connections for non-coherent components. The product is designed for complex and potentially safety-critical SoCs using processor architectures such as Arm and RISC-V.

• Last-level cache IP

  CodaCache

  CodaCache is Arteris’s last-level cache IP offering. It is intended to support data movement and memory-system efficiency in advanced SoCs by providing a shared cache layer close to the system interconnect. The product complements Arteris’s NoC and coherent-interconnect technologies in designs that combine processors, accelerators, and memory-intensive workloads.

• SoC integration automation software

  Magillem

  Magillem is a suite of SoC integration automation tools acquired from Magillem Design Services. Its capabilities are based on the IEEE 1685 IP-XACT standard and include IP packaging, connectivity management, register and memory-map handling, system assembly, and generation of associated technical artifacts. The suite is intended to reduce manual integration work across complex hardware, software, verification, simulation, and documentation flows.

• Hardware security simulation

  Cycuity Radix-S

  Cycuity Radix-S is a hardware-security simulation technology added to Arteris’s portfolio through the Cycuity acquisition. It is intended to help semiconductor security teams examine potential vulnerabilities during the design process before hardware is manufactured.

• Hardware security emulation

  Cycuity Radix-M

  Cycuity Radix-M is a hardware-security emulation product used to evaluate semiconductor security behavior during design verification. It complements simulation and static-analysis methods by enabling security-oriented testing in an emulation environment.

• Hardware security static analysis

  Cycuity Radix-ST

  Cycuity Radix-ST is a static-analysis technology for identifying hardware-security weaknesses in semiconductor designs. It forms part of Arteris’s expanded hardware security assurance offering following the Cycuity acquisition.

• 2026

  Acquire CycuityM&A

  Background

  Growing concern about semiconductor and hardware-security vulnerabilities created an adjacent market for security assurance during chip design.

  Action taken

  Arteris completed the acquisition of Cycuity and added Radix-S, Radix-M, and Radix-ST technologies.

  Aftermath

  Arteris broadened its positioning from system interconnect and integration toward an integrated semiconductor design and hardware-security assurance portfolio.

  Source

• 2023

  Acquire SemiforeM&A

  Background

  The company identified hardware-software interface management and integration automation as adjacent opportunities in complex SoC development.

  Action taken

  Arteris acquired Semifore, a provider of hardware-software interface technology.

  Aftermath

  The transaction expanded Arteris’s SoC integration automation capabilities.

  Source

• 2020

  Acquire Magillem Design ServicesM&A

  Background

  Arteris sought to broaden its business beyond NoC interconnect IP into automated SoC assembly and IP lifecycle management.

  Action taken

  The company acquired Magillem Design Services and incorporated its IEEE 1685 IP-XACT-based integration tools.

  Aftermath

  Arteris gained products for IP packaging, connectivity, registers, system assembly, documentation, and related hardware-software workflows.

  Source

• 2013

  Retain customer continuity after the Qualcomm FlexNoC transactionM&A

  Background

  Qualcomm Technologies acquired the FlexNoC product portfolio while Arteris had existing licensees and support obligations.

  Action taken

  Arteris retained existing customer contracts and continued licensing, source-code modification, and customer support for FlexNoC; Qualcomm supplied engineering deliverables and updates.

  Aftermath

  Arteris continued operating as an independent company without Qualcomm ownership interest and later expanded into additional system-IP and automation categories.

  Source

1. 1Arterisen.wikipedia.org